{"id":816,"date":"2024-01-07T09:46:25","date_gmt":"2024-01-07T01:46:25","guid":{"rendered":"https:\/\/www.nanoexpress.com\/?p=816"},"modified":"2024-01-07T11:01:50","modified_gmt":"2024-01-07T03:01:50","slug":"%e3%80%90%e4%b8%ad%e9%87%91%e6%89%80%e3%80%91%e7%bd%91%e7%bb%9c%e7%89%88%e8%a1%8c%e6%83%85%e8%bf%90%e7%bb%b4%e6%89%8b%e5%86%8c","status":"publish","type":"post","link":"https:\/\/www.nanoexpress.com\/?p=816","title":{"rendered":"\u3010\u4e2d\u91d1\u6240\u3011\u7f51\u7edc\u7248\u884c\u60c5\u8fd0\u7ef4\u624b\u518c"},"content":{"rendered":"\n

\u4e2d\u91d1\u6240\u7f51\u7edc\u7248\u884c\u60c5\u91c7\u7528ExaNIC X10\/X25\/X40\/X100\u7b49\u51e0\u79cd\u677f\u5361\uff0c\u76ee\u524d NANO\u53ea\u5728ExaNIC\u7684\u677f\u5361\u4e0a\u652f\u6301\u4e2d\u91d1\u6240\u884c\u60c5\u7684\u89e3\u7801\uff0c\u4e0d\u652f\u6301Xilinx U50\/U200\u7b49\u677f\u5361\u3002\u63a5\u53d7\u8f93\u5165\u7684\u539f\u59cb\u6570\u636e\u7c7b\u578b\u89c1 \u3010\u4e2d\u91d1\u6240\u7ec4\u64ad\u6570\u636e\u3011<\/a>\uff0c\u7f51\u7edc\u7248\u7a0b\u5e8f\u53d1\u5e03\u65f6\uff0c\u4f1a\u5728\u670d\u52a1\u5668\u4e0a\u5b89\u88c5\u4e00\u5f20\u5bf9\u5e94\u7684FPGA\u677f\u5361\u4ee5\u53ca\/rootc\/cffex\/\u76ee\u5f55\u4e2d\u7684\u4ee5\u4e0b\u8f6f\u4ef6\u8d44\u4ea7\u3002<\/p>\n\n\n\n

\u5e8f\u53f7<\/td>\u8d44\u4ea7\u540d\u79f0<\/td>\u4f5c\u7528<\/td><\/tr>
1<\/td>config.ini<\/td>\u884c\u60c5\u89e3\u7801\u914d\u7f6e\u6587\u4ef6\uff0c\u4e0b\u6587\u4e2d\u5bf9\u914d\u7f6e\u9879\u5185\u5bb9\u8fdb\u884c\u89e3\u91ca<\/td><\/tr>
2<\/td>dwninit.sh<\/td>\u7528\u4e8e\u4e0b\u8f7d\u5f53\u65e5\u89e3\u7801\u6388\u6743\u6587\u4ef6
\u9700\u5f00\u901a\u7f51\u7edc\u7248\u670d\u52a1\u5668\u81f3119.3.128.227:19900 \u7684\u4e92\u8054\u7f51\u8bbf\u95ee<\/td><\/tr>
3<\/td>libcffexfunc.so<\/td>\u672c\u5730\u7248\u76d1\u63a7\u7528\u76f8\u5173\u8f6f\u4ef6\u5e93<\/td><\/tr>
4<\/td>monitor<\/td>\u76d1\u63a7\u7a0b\u5e8f<\/td><\/tr>
5<\/td>monitor.sh<\/td>\u76d1\u63a7\u7a0b\u5e8f\u542f\u52a8\u811a\u672c<\/td><\/tr>
6<\/td>initnic\/initfpga.sh<\/td>FPGA\u677f\u5361\u521d\u59cb\u5316\u811a\u672c<\/td><\/tr>
7<\/td>license\/exanic-fpga-controller<\/td>FPGA\u6388\u6743\u7ba1\u63a7\u5de5\u5177<\/td><\/tr>
8<\/td>licensse\/exanic-fpga-controller.key<\/td>\u6388\u6743\u7801\u6587\u4ef6<\/td><\/tr>
9<\/td>license\/license.sh<\/td>\u6388\u6743\u7801\u8bfb\u53d6\u811a\u672c<\/td><\/tr>
10<\/td>..\/api\/cffex_recv<\/td>\u672c\u5730\u7248\u6570\u636e\u843d\u76d8\u7a0b\u5e8f<\/td><\/tr>
11<\/td>..\/api\/start_log.sh<\/td>\u542f\u52a8\u884c\u60c5\u6570\u636e\u843d\u76d8\u7684\u811a\u672c\u7a0b\u5e8f
\u5f53\u524d\u914d\u7f6e\uff0c\u843d\u76d8\u6570\u636e\u5c06\u4fdd\u5b58\u5728\/home\/nano\/data\u76ee\u5f55\u4e0b\uff0c\u6bcf\u65e515:30\u4e4b\u540e\u505c\u6b62\u8bb0\u5f55\u6570\u636e\uff0c\u5e76\u5c06\u6536\u5230\u7684\u6570\u636e\u538b\u7f29\u6210gzip\u683c\u5f0f\u3002<\/td><\/tr><\/tbody><\/table><\/figure>\n\n\n\n

\u5176\u4e2d\uff0cconfig.ini\u6587\u4ef6\u4e2d\u7684\u914d\u7f6e\u9879\u5185\u5bb9\u89e3\u91ca\u5982\u4e0b\uff1a<\/p>\n\n\n\n

\u5e8f\u53f7<\/td>\u914d\u7f6e\u9879\u76ee<\/td>\u5185\u5bb9\u89e3\u91ca<\/td><\/tr>
1<\/td>NIC<\/td>\u6307\u5b9aFPGA\u677f\u5361\uff0c\u9ed8\u8ba4\u4e3aexanic0\uff0c\u6839\u636e\u5b9e\u9645\u60c5\u51b5\u914d\u7f6e<\/td><\/tr>
2<\/td>SRCPORT<\/td>\u6b64\u914d\u7f6e\u9879\u76ee\u6682\u65f6\u672a\u542f\u7528\uff0c\u4e0d\u8981\u4fee\u6539<\/td><\/tr>
3<\/td>WROKALONE<\/td>\u677f\u5361\u662f\u5426\u9700\u8981\u4f9d\u8d56\u5176\u4ed6\u677f\u5361\uff0c\u914d\u7f6e\u4e3atrue\uff0c\u4e0d\u8981\u4fee\u6539<\/td><\/tr>
4<\/td>IPADDR1<\/td>\u6b64\u914d\u7f6e\u9879\u76ee\u6682\u65f6\u672a\u542f\u7528\uff0c\u4e0d\u8981\u4fee\u6539<\/td><\/tr>
5<\/td>USERNAME1<\/td>\u6b64\u914d\u7f6e\u9879\u76ee\u6682\u65f6\u672a\u542f\u7528\uff0c\u4e0d\u8981\u4fee\u6539<\/td><\/tr>
6<\/td>LOCALIP<\/td>\u7f51\u7edc\u7248\u53d1\u51fa\u7684\u7ec4\u64ad\u6570\u636e\u7684\u6e90IP\u5730\u5740<\/td><\/tr>
7<\/td>LOCALMAC<\/td>\u7f51\u7edc\u7248\u53d1\u51fa\u7684\u7ec4\u64ad\u6570\u636e\u7684\u6e90MAC\u5730\u5740<\/td><\/tr>
8<\/td>LOCALPORT<\/td>\u7f51\u7edc\u7248\u53d1\u51fa\u7684\u7ec4\u64ad\u6570\u636e\u7684\u6e90\u7aef\u53e3\u53f7<\/td><\/tr>
9<\/td>MCASTPORT<\/td>\u7f51\u7edc\u7248\u53d1\u51fa\u7684\u7ec4\u64ad\u6570\u636e\u7684\u7ec4\u64ad\u7aef\u53e3<\/td><\/tr>
10<\/td>OPTIONS<\/td>\u662f\u5426\u8f6c\u53d1\u671f\u6743\u6570\u636e\uff0crecv\u4e3a\u8f6c\u53d1\uff0cnorecv\u4e3a\u4e0d\u8f6c\u53d1<\/td><\/tr>
11<\/td>LICENSE<\/td>\u884c\u60c5\u8f6c\u53d1\u6388\u6743\uff0c\u4e0d\u914d\u7f6e\u6216\u914d\u7f6e\u9519\u8bef\u5c06\u5bfc\u81f4\u6570\u636e\u505c\u6b62<\/td><\/tr><\/tbody><\/table><\/figure>\n\n\n\n

\u884c\u60c5\u5e38\u89c1\u95ee\u9898\u4ee5\u53ca\u65e5\u5e38\u8fd0\u7ef4\u76d1\u63a7<\/strong><\/p>\n\n\n\n

\u5e8f\u53f7<\/td>\u68c0\u67e5\u9879<\/td>\u662f\u5426\u76d1\u63a7<\/td>\u73b0\u8c61<\/td><\/tr>
1<\/td>\u7f51\u7edc\u7248\u670d\u52a1\u5668\u662f\u5426\u5f00\u673a<\/td>\u662f<\/td>\u670d\u52a1\u5668\u65e0\u6cd5\u8bbf\u95ee<\/td><\/tr>
2<\/td>FPGA\u677f\u5361\u662f\u5426\u6b63\u5e38\u8bc6\u522b<\/td>\u662f<\/td>exanic-config \u547d\u4ee4\u63d0\u793aNO ExaNIC detected!<\/td><\/tr>
3<\/td>\u4e92\u8054\u7f51\u8bbf\u95ee119.3.128.227:19900<\/td>\u662f<\/td>\u8fd0\u884c\u884c\u60c5\u63a5\u6536\u7a0b\u5e8f\u63d0\u793ainit failed. No route to 119.3.128.227:19900<\/td><\/tr>
4<\/td>FPGA\u677f\u5361\u7aef\u53e3\u662f\u5426UP<\/td>\u662f<\/td>\u6267\u884cexanic-config \u89c2\u5bdf\u4e24\u4e2a\u7aef\u53e3\u72b6\u6001\u662f\u5426\u5747\u4e3alink active<\/td><\/tr>
5<\/td>\u7ec4\u64ad\u6570\u636e\u6e90\u8f93\u5165<\/td>\u662f<\/td>FPGA\u677f\u5361\u76840\u53e3\u662f\u5426\u6709\u7ec4\u64ad\u539f\u59cb\u6570\u636e\u8f93\u5165
!NANO\u4e2d\u91d1\u6240\u672a\u63d0\u4f9b\u7ec4\u64ad\u5f15\u6d41\u7a0b\u5e8f\uff0c\u82e5\u68c0\u67e5\u65e0\u7ec4\u64ad\u6570\u636e\u8f93\u5165\uff0c\u9700\u989d\u5916\u68c0\u67e5\u7ec4\u64ad\u5f15\u6d41\u7a0b\u5e8f\u6216\u8005\u4ea4\u6362\u673a\u955c\u50cf\u662f\u5426\u6b63\u5e38<\/td><\/tr>
6<\/td>\u78c1\u76d8\u7a7a\u95f4<\/td>\u662f<\/td>\u65e0\u6cd5\u843d\u76d8\u6570\u636e\uff0c\u542f\u52a8start_log.sh\u811a\u672c\u65f6\u63d0\u793a\u78c1\u76d8\u5df2\u6ee1<\/td><\/tr>
7<\/td>\u7ec4\u64ad\u6570\u636e\u8f93\u51fa<\/td>\u5426<\/td>\u786e\u4fddFPGA\u677f\u5361\u76841\u53e3\u63a5\u5165\u7ec4\u64ad\u8f93\u51fa\u4ea4\u6362\u673a\u4e0a<\/td><\/tr>
8<\/td>\u8fdb\u7a0b\u68c0\u67e5<\/td>\u662f<\/td>start_log.sh
|-cffex_recv \u4e24\u4e2a\u8fdb\u7a0b\u662f\u5426\u5747\u6b63\u5e38\u542f\u52a8\u4e14\u6b63\u5728\u8fd0\u884c
\uff089:14:00\u4e4b\u540e\uff09<\/td><\/tr>
9<\/td>\u8fdb\u7a0b\u68c0\u67e5<\/td>\u662f<\/td>monitor.sh
|-monitor \u4e24\u4e2a\u8fdb\u7a0b\u662f\u5426\u5747\u6b63\u5e38\u542f\u52a8\u4e14\u6b63\u5728\u8fd0\u884c
(9:15:00\u4e4b\u540e)<\/td><\/tr>
10<\/td>crontab\u670d\u52a1<\/td>\u662f<\/td>\u673a\u5668\u4e0a\u7684crontab\u670d\u52a1\u662f\u5426\u5728\u6b63\u5e38\u8fd0\u884c<\/td><\/tr><\/tbody><\/table><\/figure>\n\n\n\n

\u5f53\u673a\u5668\u51fa\u73b0\u610f\u5916\u60c5\u51b5\uff0c\u76d8\u4e2d\u81ea\u52a8\u6216\u624b\u52a8\u91cd\u542f\u4e86\uff0c\u91cd\u542f\u670d\u52a1\u5668\u4e4b\u540e\u53ef\u901a\u8fc7\u5982\u4e0b\u6b65\u9aa4\u5bf9\u884c\u60c5\u8fdb\u884c\u6062\u590d<\/p>\n\n\n\n

\/root\/cffex\/initnic\/initfpga.sh\n\/root\/cffex\/dwninit.sh\n\/root\/api\/start_log.sh\n\/root\/cffex\/monitor.sh<\/code><\/pre>\n","protected":false},"excerpt":{"rendered":"
\u4e2d\u91d1\u6240\u7f51\u7edc\u7248\u884c\u60c5\u91c7\u7528ExaNIC X10\/X25\/X40\/X100\u7b49\u51e0\u79cd\u677f\u5361\uff0c\u76ee\u524d NANO\u53ea\u5728ExaNIC\u7684 […]<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[3],"tags":[],"class_list":["post-816","post","type-post","status-publish","format-standard","hentry","category-fpga"],"blocksy_meta":[],"_links":{"self":[{"href":"https:\/\/www.nanoexpress.com\/index.php?rest_route=\/wp\/v2\/posts\/816","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.nanoexpress.com\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.nanoexpress.com\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.nanoexpress.com\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/www.nanoexpress.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=816"}],"version-history":[{"count":3,"href":"https:\/\/www.nanoexpress.com\/index.php?rest_route=\/wp\/v2\/posts\/816\/revisions"}],"predecessor-version":[{"id":826,"href":"https:\/\/www.nanoexpress.com\/index.php?rest_route=\/wp\/v2\/posts\/816\/revisions\/826"}],"wp:attachment":[{"href":"https:\/\/www.nanoexpress.com\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=816"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.nanoexpress.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=816"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.nanoexpress.com\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=816"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}